Identifier
etd-10042013-162109
Degree
Doctor of Philosophy (PhD)
Department
Electrical and Computer Engineering
Document Type
Dissertation
Abstract
In the past decade, semiconductor manufacturers are persistent in building faster and smaller transistors in order to boost the processor performance as projected by Moore’s Law. Recently, as we enter the deep submicron regime, continuing the same processor development pace becomes an increasingly difficult issue due to constraints on power, temperature, and the scalability of transistors. To overcome these challenges, researchers propose several innovations at both architecture and device levels that are able to partially solve the problems. These diversities in processor architecture and manufacturing materials provide solutions to continuing Moore’s Law by effectively exploiting the heterogeneity, however, they also introduce a set of unprecedented challenges that have been rarely addressed in prior works. In this dissertation, we present a series of in-depth studies to comprehensively investigate the design and optimization of future multi-core and many-core platforms through exploiting heteroge-neities. First, we explore a large design space of heterogeneous chip multiprocessors by exploiting the architectural- and device-level heterogeneities, aiming to identify the optimal design patterns leading to attractive energy- and cost-efficiencies in the pre-silicon stage. After this high-level study, we pay specific attention to the architectural asymmetry, aiming at developing a heterogeneity-aware task scheduler to optimize the energy-efficiency on a given single-ISA heterogeneous multi-processor. An advanced statistical tool is employed to facilitate the algorithm development. In the third study, we shift our concentration to the device-level heterogeneity and propose to effectively leverage the advantages provided by different materials to solve the increasingly important reliability issue for future processors.
Date
2013
Document Availability at the Time of Submission
Student has submitted appropriate documentation to restrict access to LSU for 365 days after which the document will be released for worldwide access.
Recommended Citation
Zhang, Ying, "Exploiting heterogeneity in Chip-Multiprocessor Design" (2013). LSU Doctoral Dissertations. 3918.
https://repository.lsu.edu/gradschool_dissertations/3918
Committee Chair
Peng, Lu
DOI
10.31390/gradschool_dissertations.3918