Self-routing permutation network
A self-routing permutation network is presented which has O(log3 n) delay and uses O(n log3 n) hardware where n is the number of inputs to the network. The network is derived from a complementary Benes network by replacing each of its two switches in its first stage by what is called a 1-sorter and recursively defining the switches in the third stage as self-routing networks. The use of 1-sorters results in substantial reduction in both propagation delay and hardware cost when contrasted with O(n) delay and O(n1.59) hardware of the complementary Benes network. Furthermore, these complexities match the propagation delay and hardware cost of Batcher's sorters. Specifically, it is shown that the network of this paper uses one half of the hardware with about four thirds of the delay of a Batcher sorter.
Publication Source (Journal or Book title)
Proceedings of the International Conference on Parallel Processing
Koppelman, D., & Oruc, A. (1989). Self-routing permutation network. Proceedings of the International Conference on Parallel Processing, 1, 288-295. Retrieved from https://repository.lsu.edu/eecs_pubs/661