Title
Neighborhood prefetching on multiprocessors using instruction history
Document Type
Conference Proceeding
Publication Date
12-1-2000
Abstract
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood is based on the data address and the past behavior of the instruction that missed the cache. A neighborhood for an instruction is constructed by recording the offsets of addresses that subsequently miss. This neighborhood prefetching can exploit sequential access as can sequential prefetch and can to some extent exploit stride access, as can stride prefetch. Unlike stride and sequential prefetch it can support irregular access patterns. Neighborhood prefetching was compared to adaptive sequential prefetching using execution-driven simulation. Results show more useful prefetches and lower execution time for neighborhood prefetching for six of eight SPLASH-2 benchmarks. On eight SPLASH-2 benchmarks the average normalized execution time is less than 0.9, for three benchmarks, less than 0.8.
Publication Source (Journal or Book title)
Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT
First Page
123
Last Page
132
Recommended Citation
Koppelman, D. (2000). Neighborhood prefetching on multiprocessors using instruction history. Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, 123-132. Retrieved from https://repository.lsu.edu/eecs_pubs/651