Document Type
Conference Proceeding
Publication Date
11-15-2015
Abstract
Stencil computations are at the core of applications in a number of scientific computing domains. We describe a domain-specific language for regular stencil computations that allows specification of the computations in a concise manner. We describe a multitarget compiler for this DSL, which generates optimized code for GPUa, FPGAS, and multi-core processors with short-vector SIMD instruction sets, considering both low-order and high-order stencil computations. The hardware differences between these three types of architecture prompt different optimization strategies for the compiler. We evaluate the domain-specific compiler using a number of benchmarks on CPU, GPU and FPGA platforms.
Publication Source (Journal or Book title)
Proceedings of WOLFHPC 2015: 5th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis
Recommended Citation
Rawat, P., Kong, M., Henretty, T., Holewinski, J., Stock, K., Pouchet, L., Ramanujam, J., Rountev, A., & Sadayappan, P. (2015). SDSLc: A multi-target domain-specific compiler for stencil computations. Proceedings of WOLFHPC 2015: 5th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing - Held in conjunction with SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis https://doi.org/10.1145/2830018.2830025
