Optimal microarchitectural design configuration selection for processor hard-error reliability
Document Type
Conference Proceeding
Publication Date
7-16-2012
Abstract
Traditional design space exploration mainly focuses on performance and power consumption. However, as one of the first-class constraints for modern processor design, the relationship between hard-error reliability and processor configurations has not been well studied. In this paper, we investigate this relationship by exploring a large processor design space. We employ a rule search strategy, i.e. Patient Rule Induction Method, to generate a set of rules which choose optimal configurations for processor hard-error reliability and its tradeoff with performance and power consumption. © 2012 IEEE.
Publication Source (Journal or Book title)
Proceedings - International Symposium on Quality Electronic Design, ISQED
First Page
91
Last Page
96
Recommended Citation
Zhang, Y., Duan, L., Li, B., & Peng, L. (2012). Optimal microarchitectural design configuration selection for processor hard-error reliability. Proceedings - International Symposium on Quality Electronic Design, ISQED, 91-96. https://doi.org/10.1109/ISQED.2012.6187479