Scheduling DAGs for fixed-point DSP processors by using worm partitions
Document Type
Conference Proceeding
Publication Date
9-22-2008
Abstract
This paper concerns a code generation for directed acyclic graphs (DAGs). The set of edges that connect consecutively scheduled operations along with the nodes that correspond to the consecutively scheduled operations constitutes a worm. We propose an algorithm to construct a partitioning of a DAG into a collection of worms. This is done by finding the longest worm at the moment and maintaining the legality of worm partitioning. We characterize a legality of worm partitioning by introducing a simple set notation and proving its property. Based on that notation and its property, we prove that our algorithm correctly works. We also show that our algorithm works even in a DAG which contains interleaved sharing. Experimental results on several DAGS show that our technique generates worm partitioning of DAGs with small cardinality. © 2008 IEEE.
Publication Source (Journal or Book title)
Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008
First Page
567
Last Page
574
Recommended Citation
Hong, J., & Ramanujam, J. (2008). Scheduling DAGs for fixed-point DSP processors by using worm partitions. Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008, 567-574. https://doi.org/10.1109/ICESS.2008.89