On designing implementable algorithms for the linear reconfigurable mesh
Document Type
Conference Proceeding
Publication Date
12-1-2003
Abstract
Although algorithms for the reconfigurable mesh (R-Mesh) are fast, they are very difficult to implement because most algorithms employ buses that span Ω(N) processors. On such buses, the constant bus-delay assumption, that is central to all R-Mesh algorithms, does not hold. In this paper, we consider a powerful restriction of the R-Mesh, called LR-Mesh, and show that a large class of fundamental LR-Mesh algorithms can be efficiently implemented using limited delay buses. We introduce a new measure of bus delay, called "bends-cost", and describe an LR-Mesh implementation for which bends-cost is a faithful measure of the actual bus delay. Next, we show that an important class of LR-Mesh algorithms (that includes algorithms for prefix sums, multiple addition, and sorting) can be implemented efficiently using buses whose delay is at most D, a parameter of the design. In particular, if the technology used can support a delay of D = Nε for an arbitrarly small constant ε > 0, then the running times of these algorithms are within a constant of their idealized LR-Mesh counterparts.
Publication Source (Journal or Book title)
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications
First Page
241
Last Page
246
Recommended Citation
El-Boghdadi, H., Vaidyanathan, R., Trahan, J., & Rai, S. (2003). On designing implementable algorithms for the linear reconfigurable mesh. Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1, 241-246. Retrieved from https://repository.lsu.edu/eecs_pubs/1740