Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Document Type
Article
Publication Date
1-1-2009
Abstract
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core processors. However, for multi-statement input programs with statements of different dimensionalities, such as Cholesky or LU decomposition, the parallel tiled code generated by existing automatic parallelization approaches may suffer from significant load imbalance, resulting in poor scalability on multi-core systems. In this paper, we develop a completely automatic parallelization approach for transforming input affine sequential codes into efficient parallel codes that can be executed on a multi-core system in a load-balanced manner. In our approach, we employ a compile-time technique that enables dynamic extraction of inter-tile dependences at run-time, and dynamic scheduling of the parallel tiles on the processor cores for improved scalable execution. Our approach obviates the need for programmer intervention and re-writing of existing algorithms for efficient parallel execution on multi-cores.We demonstrate the usefulness of our approach through comparisons using linear algebra computations: LU and Cholesky decomposition. © 2009 ACM.
Publication Source (Journal or Book title)
ACM SIGPLAN Notices
First Page
219
Last Page
228
Recommended Citation
Baskaran, M., Vydyanathan, N., Bondhugula, U., Ramanujam, J., Rountev, A., & Sadayappan, P. (2009). Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors. ACM SIGPLAN Notices, 44 (4), 219-228. https://doi.org/10.1145/1594835.1504209